参考文献
[1] ADEE S. The hunt for the kill switch[J]. IEEE Spectrum, 2008,45(5): 34-39.
[2] YEH A. Trends in the global IC design service market[R]. 2012.
[3] ROSTAMI M, KOUSHANFAR F, RAJENDRAN J, et al. Hardware security: Threat models and metrics[C]// Proceedings of the International Conference on Computer-Aided Design. IEEE, 2013:819-823.
[4] KARRI R, RAJENDRAN J, ROSENFELD K, et al. Trustworthy hardware: Identifying and classifying hardware Trojans[J]. IEEE Computer, 2010,43(10): 39-46.
[5] TEHRANIPOOR M, WANG C. Introduction to hardware security and trust[M].New York: Springer, 2011.
[6] AGRAWAL D, BAKTIR S, KARAKOYUNLU D, et al. Trojan detection using ic fingerprinting[C]// Proceedings of the IEEE Symposium on Security and Privacy(SP’07). IEEE, 2007:296-310.
[7] TEHRANIPOOR M, KOUSHANFAR F. A survey of hardware trojan taxonomy and detection[J]. IEEE design & test of computers, 2010,27(1): 10-25.
[8] JIN Y, KUPP N, MAKRIS Y. Experiences in hardware Trojan design and implementation[C]//Proceedings of the IEEE International Workshop on Hardware-Oriented Security and Trust(HOST). Francisco, CA, USA: IEEE, 2009:50-57.
[9] BHUNIA S, HSIAO M S, BANGA M, et al. Hardware trojan attacks: threat analysis and countermeasures[J]. Proceedings of the IEEE, 2014,102(8): 1229-1247.
[10] SHIYANOVSKII Y, WOLFF F, RAJENDRAN A, et al. Process reliability based trojans through nbti and hci effects[C]//Proceedings of the NASA/ESA Conference on Adaptive Hardware and Systems(AHS). IEEE, 2010:215-222.
[11] DUNBAR C, QU G. Designing trusted embedded systems from finite state machines[J]. ACM Transactions on Embedded Computing Systems(TECS), 2014,13(5s): 1-20.
[12] YANG K, HICKS M, DONG Q, et al. A2: Analog malicious hardware[C]//Proceedings of the IEEE Symposium on Security and Privacy(SP). IEEE, 2016:18-37.
[13] TEHRANIPOOR M, KOUSHANFAR F. A survey of hardware Trojan taxonomy and detection[J]. IEEE Design Test of Computers, 2010,27:10-25.
[14] LIN L, KASPER M, GUNEYSU T, et al. Trojan side-channels: lightweight hardware trojans through side- channel engineering[C]//Proceedings of the Cryptographic Hardware and Embedded Systems(CHES). Springer, 2009:382-395.
[15] LIN L, BURLESON W, PAAR C. MOLES: Malicious off-chip leakage enabled by side-channels[C]// Proceedings of the 2009 International Conference on Computer-Aided Design. ACM, 2009:117-122.
[16] LIU Y, JIN Y, MAKRIS Y. Hardware trojans in wireless cryptographic ICs: Silicon demonstration & detection method evaluation[C]//Proceedings of the 2013 IEEE/ACM International Conference on Computer-Aided Design(ICCAD). San Jose, CA, USA: IEEE, 2013:399-404.
[17] CHA B, GUPTA S K. A resizing method to minimize effects of hardware trojans[C]//Proceedings of the IEEE 23rd Asian Test Symposium(ATS). IEEE, 2014:192-199.
[18] TrustHub[EB].
[19] BAO C, FORTE D, SRIVASTAVA A. On application of one-class SVM to reverse engineering-based hardware Trojan detection[C]//Proceedings of the 15th International Symposium on Quality Electronic Design(ISQED). IEEE, 2014:47-54.
[20] BANGA M, HSIAO M. A novel sustained vector technique for the detection of hardware Trojans[C]// Proceedings of the 22nd International Conference on VLSI Design. IEEE, 2009:327-332.
[21] CHAKRABORTY R S, BHUNIA S. Security against hardware trojan through a novel application of design obfuscation[C]//Proceedings of the 2009 International Conference on Computer-Aided Design. ACM, 2009:113-116.
[22] WANG X, TEHRANIPOOR M, PLUSQUELLIC J. Detecting malicious inclusions in secure hardware: Challenges and solutions[C]//Proceedings of the IEEE International Workshop on Hardware-Oriented Security and Trust. IEEE, 2008:15-19.
[23] JIN Y, MAKRIS Y. Hardware Trojan detection using path delay fingerprint[C]//Proceedings of the IEEE International Workshop on Hardware-Oriented Security and Trust(HOST). Anaheim, CA, USA: IEEE, 2008:51-57.
[24] XIAO K, ZHANG X, TEHRANIPOOR M. A clock sweeping technique for detecting hardware trojans impacting circuits delay[J]. IEEE Design & Test, 2013,30(2): 26-34.
[25] AGRAWAL D, BAKTIR S, KARAKOYUNLU D, et al. Trojan detection using IC fingerprinting[C]// Proceedings of the IEEE Symposium on Security and Privacy. IEEE, 2007:296-310.
[26] AARESTAD J, ACHARYYA D, RAD R, et al. Detecting trojans through leakage current analysis using multiple supply pad iddqs[J]. IEEE Transactions on information forensics and security, 2010,5(4): 893-904.
[27] FORTE D, BAO C, SRIVASTAVA A. Temperature tracking: An innovative run-time approach for hardware trojan detection[C]//Proceedings of the International Conference on Computer-Aided Design. IEEE, 2013:532-539.
[28] STELLARI F, SONG P, WEGER A J, et al. Verification of untrusted chips using trusted layout and emission measurements[C]//Proceedings of the IEEE International Symposium on Hardware-Oriented Security and Trust(HOST). IEEE, 2014:19-24.
[29] ZHOU B, ADATO R, ZANGENEH M, et al. Detecting hardware trojans using backside optical imaging of embedded watermarks[C]//Proceedings of the 52nd Annual Design Automation Conference. ACM, 2015:1-6.
[30] ZHANG X, TEHRANIPOOR M. Case study: Detecting hardware trojans in third-party digital ip cores[C]// Proceedings of the IEEE International Symposium on Hardware-Oriented Security and Trust(HOST). IEEE, 2011:67-70.
[31] HICKS M, FINNICUM M, KING S T, et al. Overcoming an untrusted computing base: Detecting and removing malicious hardware automatically[C]//Proceedings of IEEE Symposium on Security and Privacy. IEEE, 2010:159-172.
[32] SALMANI H, TEHRANIPOOR M. Analyzing circuit vulnerability to hardware trojan insertion at the behavioral level[C]//Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems(DFT). IEEE, 2013:190-195.
[33] WAKSMAN A, SUOZZO M, SETHUMADHAVAN S. FANCI: Identification of stealthy malicious logic using boolean functional analysis[C]//CCS’13: Proceedings of the ACM SIGSAC Conference on Computer & Communications Security. ACM, 2013:697-708.
[34] OYA M, SHI Y, YANAGISAWA M, et al. A score-based classification method for identifying hardware- trojans at gate-level netlists[C]//Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition. IEEE, 2015:465-470.
[35] RATHMAIR M, SCHUPFER F, KRIEG C. Applied formal methods for hardware trojan detection[C]// Proceedings of the IEEE International Symposium on Circuits and Systems(ISCAS). IEEE, 2014:169-172.
[36] RAJENDRAN J, VEDULA V, KARRI R. Detecting malicious modifications of data in third-party intellectual property cores[C]//Proceedings of the 52nd Annual Design Automation Conference. ACM, 2015:1-6.
[37] LOVE E, JIN Y, MAKRIS Y. Enhancing security via provably trustworthy hardware intellectual property[C]// Proceedings of the 2011 IEEE International Symposium on Hardware-Oriented Security and Trust(HOST). San Diego, CA, USA: IEEE, 2011:12-17.
[38] GUO X, DUTTA R G, JIN Y, et al. Pre-silicon security verification and validation: A formal perspective[C]// DAC’15: Proceedings of the 52nd Annual Design Automation Conference. San Francisco, CA, USA: ACM, 2015:145:1-145:6.
[39] GUO X, DUTTA R G, JIN Y. Eliminating the hardware-software boundary: A proof-carrying approach for trust evaluation on computer systems[J]. IEEE Transactions on Information Forensics and Security(TIFS), 2017,12(2): 405-417.
[40] GUO X, DUTTA R G, MISHRA P, et al. Automatic code converter enhanced pch framework for soc trust verification[J]. IEEE Transactions on Very Large Scale Integration System(TVLSI), 2017,25(12): 3390-3400.
[41] SALMANI H, TEHRANIPOOR M. Layout-aware switching activity localization to enhance hardware trojan detection[J]. IEEE Transactions on Information Forensics and Security, 2012,7(1): 76-87.
[42] ZHOU B, ZHANG W, THAMBIPILLAI S, et al. A low cost acceleration method for hardware trojan detection based on fan-out cone analysis[C]//Proceedings of the 2014 International Conference on Hardware/Software Codesign and System Synthesis(CODES). ACM, 2014:1-10.
[43] RAJENDRAN J, JYOTHI V, SINANOGLU O, et al. Design and analysis of ring oscillator based design- for-trust technique[C]//Proceedings of the IEEE 29th VLSI Test Symposium(VTS). IEEE, 2011:105-110.
[44] LI J, LACH J. At-speed delay characterization for ic authentication and trojan horse detection[C]//Proceedings of the IEEE International Workshop on Hardware-Oriented Security and Trust(HOST). IEEE, 2008:8-14.
[45] RAMDAS A, SAEED S M, SINANOGLU O. Slack removal for enhanced reliability and trust[C]//Proceedings of the 9th IEEE International Conference On Design & Technology of Integrated Systems In Nanoscale Era(DTIS). IEEE, 2014:1-4.
[46] ZHANG X, TEHRANIPOOR M. Ron: An on-chip ring oscillator network for hardware trojan detection[C]// Proceedings of the Design, Automation & Test in Europe Conference & Exhibition(DATE). IEEE, 2011:1-6.
[47] NARASIMHAN S, YUEH W, WANG X, et al. Improving ic security against trojan attacks through integration of security monitors[J]. IEEE Design & Test of Computers, 2012,29(5): 37-46.
[48] CAO Y, CHANG C H, CHEN S. Cluster-based distributed active current timer for hardware trojan detection[C]//Proceedings of the IEEE International Symposium on Circuits and Systems(ISCAS). IEEE, 2013:1010-1013.
[49] CHA B, GUPTA S K. Efficient trojan detection via calibration of process variations[C]//Proceedings of the IEEE 21st Asian Test Symposium(ATS). IEEE, 2012:355-361.
[50] LIU Y, HUANG K, MAKRIS Y. Hardware trojan detection through golden chip-free statistical side-channel fingerprinting[C]//Proceedings of the 51st Annual Design Automation Conference. ACM, 2014:1-6.
[51] BLOOM G, NARAHARI B, SIMHA R. Os support for detecting trojan circuit attacks[C]//Proceedings of the IEEE International Workshop on Hardware-Oriented Security and Trust(HOST). IEEE, 2009:100-103.
[52] DUBEUF J, HELY D, KARRI R. Run-time detection of hardware trojans: The processor protection unit[C]// Proceedings of the 18th IEEE European Test Symposium(ETS). IEEE, 2013:1-6.
[53] JIN Y, SULLIVAN D. Real-time trust evaluation in integrated circuits[C]//Proceedings of the Design, Automation and Test in Europe Conference and Exhibition(DATE), 2014. Dresden, Germany: IEEE, 2014:1-6.
[54] JIN Y, MALIUK D, MAKRIS Y. Post-deployment trust evaluation in wireless cryptographic ICs[C]// Proceedings of the Design, Automation Test in Europe Conference Exhibition(DATE), 2012. Dresden, Germany: IEEE, 2012:965-970.
[55] ROY J A, KOUSHANFAR F, MARKOV I L. Epic: Ending piracy of integrated circuits[C]//DATE’08: Proceedings of the Conference on Design, Automation and Test in Europe. IEEE, 2008:1069-1074.
[56] BAUMGARTEN A, TYAGI A, ZAMBRENO J. Preventing ic piracy using reconfigurable logic barriers[J]. IEEE Design Test of Computers, 2010,27(1): 66-75.
[57] LIU B, WANG B. Embedded reconfigurable logic for asic design obfuscation against supply chain attacks[C]//Proceedings of the Design, Automation and Test in Europe Conference and Exhibition(DATE). IEEE, 2014:1-6.
[58] WENDT J B, POTKONJAK M. Hardware obfuscation using puf-based logic[C]//ICCAD’14: Proceedings of the 2014 IEEE/ACM International Conference on Computer-Aided Design. IEEE, 2014:270-277.
[59] COCCHI R P, BAUKUS J P, CHOW L W, et al. Circuit camouflage integration for hardware ip protection[C]//Proceedings of the 51st Annual Design Automation Conference. ACM, 2014:1-5.
[60] RAJENDRAN J, SAM M, SINANOGLU O, et al. Security analysis of integrated circuit camouflaging[C]// CCS’13: Proceedings of the 2013 ACM SIGSAC Conference on Computer & Communications Security. ACM, 2013:709-720.
[61] BI Y, GAILLARDON P E, HU X S, et al. Leveraging emerging technology for hardware security-case study on silicon nanowire fets and graphene symfets[C]//Proceedings of the Asia Test Symposium(ATS). Hangzhou, China: IEEE, 2014:342-347.
[62] XIAO K, TEHRANIPOOR M. Bisa: Built-in self-authentication for preventing hardware trojan insertion[C]// Proceedings of the IEEE International Symposium on Hardware-Oriented Security and Trust(HOST). IEEE, 2013:45-50.
[63] MCINTYRE D, WOLFF F, PAPACHRISTOU C, et al. Trustworthy computing in a multi-core system using distributed scheduling[C]//Proceedings of the IEEE 16th International On-Line Testing Symposium(IOLTS). IEEE, 2010:211-213.
[64] LIU C, RAJENDRAN J, YANG C, et al. Shielding heterogeneous mpsocs from untrustworthy 3pips through security-driven task scheduling[J]. IEEE Transactions on Emerging Topics in Computing, 2014,2(4): 461-472.
[65] KEREN O, LEVIN I, KARPOVSKY M. Duplication based one-to-many coding for trojan hw detection[C]//Proceedings of the IEEE 25th International Symposium on Defect and Fault Tolerance in VLSI Systems(DFT). IEEE, 2010:160-166.
[66] REECE T, LIMBRICK D B, ROBINSON W H. Design comparison to identify malicious hardware in external intellectual property[C]//Proceedings of the IEEE 10th International Conference on Trust, Security and Privacy in Computing and Communications(TrustCom). IEEE, 2011:639-646.
[67] ACTIVITY I A R P. Trusted integrated chips(TIC)program[EB]. 2011.
[68] VAIDYANATHAN K, DAS B P, SUMBUL E, et al. Building trusted ics using split fabrication[C]//Proceedings of the IEEE International Symposium on Hardware-Oriented Security and Trust(HOST). IEEE, 2014:1-6.
[69] JAGASIVAMANI M, GADFORT P, SIKA M, et al. Split-fabrication obfuscation: Metrics and techniques[C]//Proceedings of the Hardware-Oriented Security and Trust(HOST). IEEE, 2014:7-12.
[70] HILL B, KARMAZIN R, OTERO C, et al. A split-foundry asynchronous fpga[C]//Proceedings of the IEEE Custom Integrated Circuits Conference(CICC). IEEE, 2013:1-4.
[71] XIE Y, BAO C, SRIVASTAVA A. Security-aware design flow for 2.5 D IC technology[C]//Proceedings of the 5th International Workshop on Trustworthy Embedded Devices. ACM, 2015:31-38.
[72] VALAMEHR J, SHERWOOD T, KASTNER R, et al. A 3-d split manufacturing approach to trustworthy system development[J]. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2013,32(4): 611-615.
[73] IMESON F, EMTENAN A, GARG S, et al. Securing computer hardware using 3d integrated circuit(ic)technology and split manufacturing for obfuscation[C]//Proceedings of the 22nd USENIX Security Symposium(USENIX Security 13). Washington, D.C.: USENIX, 2013:495-510.
[74] IWASE T, NOZAKI Y, YOSHIKAWA M, et al. Detection technique for hardware trojans using machine learning in frequency domain[C]//Proceedings of the IEEE 4th Global Conference on Consumer Electronics(GCCE). IEEE, 2015:185-186.
[75] KELLY S, ZHANG X, TEHRANIPOOR M, et al. Detecting hardware trojans using on-chip sensors in an asic design[J]. Journal of Electronic Testing, 2015,31(1): 11-26.
[76] WAHBY R S, HOWALD M, GARG S, et al. Verifiable asics[C]//Proceedings of the IEEE Symposium on Security and Privacy(SP). IEEE, 2016:759-778.
[77] NGO X T, EXURVILLE I, BHASIN S, et al. Hardware trojan detection by delay and electromagnetic measurements[C]//Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition. IEEE, 2015:782-787.
[78] BILZOR M, HUFFMIRE T, IRVINE C, et al. Evaluating security requirements in a general-purpose processor by combining assertion checkers with code coverage[C]//Proceedings of the IEEE International Symposium on Hardware-Oriented Security and Trust(HOST). IEEE, 2012:49-54.
[79] HOU Y, HE H, SHAMSI K, et al. On-chip analog trojan detection framework for microprocessor trustworthiness[J]. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems(TCAD), 2019,38(10): 1820-1830.
[80] HOU Y, HE H, SHAMSI K, et al. R2D2: Runtime reassurance and detection of a2 trojan[C]//Proceedings of the IEEE Symposium on Hardware Oriented Security and Trust(HOST). Washington, DC, USA: IEEE, 2018:195-200.
[81] SOLL O, KORAK T, MUEHLBERGHUBER M, et al. Em-based detection of hardware trojans on fpgas[C]// Proceedings of the IEEE International Symposium on Hardware-Oriented Security and Trust(HOST). IEEE, 2014:84-87.
[82] BALASCH J, GIERLICHS B, VERBAUWHEDE I. Electromagnetic circuit fingerprints for hardware trojan detection[C]//Proceedings of the IEEE International Symposium on Electromagnetic Compatibility(EMC). IEEE, 2015:246-251.
[83] BAO C, FORTE D, SRIVASTAVA A. Temperature tracking: Toward robust run-time detection of hardware trojans[J]. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2015,34(10): 1577-1585.
[84] FUJIMOTO D, NIN S, HAYASHI Y I, et al. A demonstration of a ht-detection method based on impedance measurements of the wiring around ics[J]. IEEE Transactions on Circuits and Systems II: Express Briefs, 2018,65(10): 1320-1324.
[85] NGO X T, NAJM Z, BHASIN S, et al. Method taking into account process dispersions to detect hardware trojan horse by side-channel[C]//Proceedings of the PROOFS: Security Proofs for Embedded Systems. HAL, 2014:1-16.
[86] HE J, ZHAO Y, GUO X, et al. Hardware trojan detection through chip-free electromagnetic side-channel statistical analysis[J]. IEEE Transactions on Very Large Scale Integration System(TVLSI), 2017,25(10): 2939-2948.
[87] HE J, LIU Y, YUAN Y, et al. Golden chip free trojan detection leveraging electromagnetic side channel fingerprinting[J]. IEICE Electronics Express, 2018,16(2): 1-9.
[88] GUIN U, HUANG K, DIMASE D, et al. Counterfeit integrated circuits: A rising threat in the global semiconductor supply chain[J]. Proceedings of the IEEE, 2014,102(8): 1207-1228.
[89] HUANG H, BOYER A, DHIA S B. The detection of counterfeit integrated circuit by the use of electromagnetic fingerprint[C]//Proceedings of the International Symposium on Electromagnetic Compatibility. IEEE, 2014:1118-1122.
[90] KIM Y, DALY R, KIM J, et al. Flipping bits in memory without accessing them: An experimental study of dram disturbance errors[J]. ACM SIGARCH Computer Architecture News, 2014,42(3): 361-372.
[91] NARASIMHAN S, WANG X, DU D, et al. Tesr: A robust temporal self-referencing approach for hardware trojan detection[C]//Proceedings of the IEEE International Symposium on Hardware-Oriented Security and Trust. IEEE, 2011:71-74.
[92] ZHANG X, XIAO K, TEHRANIPOOR M, et al. A study on the effectiveness of trojan detection techniques using a red team blue team approach[C]//Proceedings of the IEEE 31st VLSI Test Symposium(VTS). IEEE, 2013:1-3.