What is a GPIO line?

A General Purposes Input Output (GPIO) line is a pin of a microcontroller or CPU or other integrated circuit whose behavior is controllable by the user at runtime. So, a GPIO pin has no predefined usage, but the developer has the ability to set it for input or output usage (for simpler implementations) or as an IRQ source or other functionalities.

In general, a GPIO line can:

• Be enabled/disabled.
• Be configured as input or output.
• Have readable/writable output values (typically, high is 1 and low is 0).
• Have readable input values (typically, high is 1 and low is 0).
• Have default pulled-up or pulled-down input values.
• Have input values to be used as IRQ source.

The GPIO lines are so generic that if adequately used in a dedicated program, they can be used to emulate another digital interface controller; in fact, inside the Linux kernel, we can find several kinds of peripheral controllers emulated via GPIO (the most famous and used are the keyboard, I²C and W1 controllers; in particular, the latter will be shown in this book in Chapter 11 , 1-Wire - W1 , in Using the GPIO interface section).

Tip

This technique is called bit banging and it's used to implement several Linux device drivers. The advantage in using it is the fact we can emulate pieces of hardware, but as is obvious, the downside is the amount of CPU cycles consumed, which in turn limits the maximum throughput of the interface.

Apart from this fact, the main usage for these lines is controlling signals (reset, power enable, suspend, card detect, and so on) and managing relays, LEDs, switches, buttons, and so on; that is, everywhere, we have to read or write two statuses: high or low, open or close, 0 or 1.

GPIOs are also related with the pinmux functionality, which controls the CPU's physical I/O pins and allows the developer to alter the direction and input/drive characteristics as well as configure the pin peripheral multiplexer selection. In fact, our embedded kits are equipped with SoCs that have on-chip tons of peripherals and a limited (even if very high) number of available pins, so it's quite normal that most peripherals share some pins with the result that the developer cannot use these peripherals at the same time. In this scenario, the GPIOs subsystem is considered a normal peripheral that can share their pins with the other; that's why we have to deal with the pinmux functionality and its son: pinctrl.

We can get access to pinctrl under the /sys/kernel/debug/pinctrl directory, and as an example, on SAMA5D3 Xplained, we have the following:

root@a5d3:~# ls /sys/kernel/debug/pinctrl/
ahb:apb:pinctrl@fffff200 pinctrl-devices pinctrl-handles pinctrl-maps

Here, the relevant file is the ahb:apb:pinctrl@fffff200 directory, which holds the status of the SAMA5D3 Xplained's pinmux system. Looking into it, we see the following files:

root@a5d3:~# cat /sys/kernel/debug/pinctrl/ahb\:apb\:pinctrl\@fffff200
/
gpio-ranges pinconf-groups pingroups pinmux-pins
pinconf-config pinconf-pins pinmux-functions pins

In the gpio-ranges file, we can find all GPIOs defined in the system pided per gpiochip; in fact, SAMA5D3 Xplained has five gpiochips:

root@a5d3:~# cat /sys/kernel/debug/pinctrl/ahb\:apb\:pinctrl\@fffff200
/gpio-ranges
GPIO ranges handled:
0: fffff200.gpio GPIOS [0 - 31] PINS [0 - 31]
1: fffff400.gpio GPIOS [32 - 63] PINS [32 - 63]
2: fffff600.gpio GPIOS [64 - 95] PINS [64 - 95]
3: fffff800.gpio GPIOS [96 - 127] PINS [96 - 127]
4: fffffa00.gpio GPIOS [128 - 159] PINS [128 - 159]

In file pins, we have the complete list of all the defined pins with their identification number and name string:

root@a5d3:~# cat /sys/kernel/debug/pinctrl/ahb:apb:pinctrl@fffff200/pi ns
registered pins: 160
pin 0 (pioA0) ahb:apb:pinctrl@fffff200
pin 1 (pioA1) ahb:apb:pinctrl@fffff200
pin 2 (pioA2) ahb:apb:pinctrl@fffff200
pin 3 (pioA3) ahb:apb:pinctrl@fffff200
...

Tip

Note that SAMA5D3 Xplained doesn't use the usual naming as gpio0, gpio1, gpio2, among others but pioA0, pioA1, and so on instead, where the pioA prefix is referred to the port name where the pin is attached to. SAMA5D3 Xplained has five ports named from A to E, so we also have pioB0, pioB1, ..., pioC0, pioC1, ..., pioD0, pioD1, ..., PE0, pioE1, ..., pioE31.

Each pin can be associated with a specific function, which can be listed by looking into the pingroups file. The following is reported part of the output we can get on SAMA5D3 Xplained, where we can see that pioB0 can be associated with two functions:

root@a5d3:~# cat /sys/kernel/debug/pinctrl/ahb\:apb\:pinctrl\@fffff200 /pingroups
...
group: pwm0_pwmh0-1
pin 32 (pioB0)
...
group: macb0_data_rgmii
pin 32 (pioB0)
pin 33 (pioB1)
pin 34 (pioB2)
pin 35 (pioB3)
pin 36 (pioB4)
pin 37 (pioB5)
pin 38 (pioB6)
pin 39 (pioB7)
...

To learn how the current pinmux is set, we can take a look at the pinmux-pins file. On SAMA5D3 Xplained, we see the following (again, the output has been reduced for space reasons):

root@a5d3:~# cat /sys/kernel/debug/pinctrl/ahb\:apb\:pinctrl\@fffff200
/pinmux-pins 
Pinmux settings per pin
Format: pin (name): mux_owner gpio_owner hog?
pin 0 (pioA0): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 1 (pioA1): (MUX UNCLAIMED) (GPIO UNCLAIMED)
...
pin 17 (pioA17): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 18 (pioA18): f801c000.i2c (GPIO UNCLAIMED) function board group i2
c2_pu
pin 19 (pioA19): f801c000.i2c (GPIO UNCLAIMED) function board group i2
c2_pu
pin 20 (pioA20): f002c000.pwm (GPIO UNCLAIMED) function pwm0 group pwm
0_pwmh0-0
pin 21 (pioA21): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 22 (pioA22): f002c000.pwm (GPIO UNCLAIMED) function pwm0 group pwm
0_pwmh1-0 ... 

Here, we can see which are unclaimed pins, which are claimed as GPIOs, and which ones are claimed for such peripherals.

Tip

You can get further and more detailed information regarding pixmux and pinctrl at:  https://www.kernel.org/doc/Documentation/pinctrl.txt .

GPIOs lines on the BeagleBone Black

As already mentioned in Chapter 1, Installing the Developing System, in The BeagleBone Black section, the BeagleBone Black has two expansion connectors where several signals are exposed and where we can find several GPIO pins, as reported in the following table:

In reality, almost all exported pins can be programmed for GPIO functionalities thanks to a pinmux (pin multiplexer) that can physically connect a CPU's pin to different internal peripherals. However, these settings are usually not needed and they are machine-dependent, so in this case, the developer has to know in detail how the CPU is composed and how it can be programmed in order to correctly set up pinmux.

Note

A complete BeagleBone Black's connector description and a quick introduction on the pins configuration for different usage is available at: http://elinux.org/Beagleboard:Cape_Expansion_Headers.

GPIOs on the SAMA5D3 Xplained

On SAMA5D3 Xplained, the GPIOs are exposed on the expansion connector, as already mentioned in Chapter 1, in Installing the Developing System, in The SAMA5D3 Xplained section, and in this case, each pin is named PA1, PA2, ..., PB1, ... PC1 and so on and can be used as a GPIO line.

Tip

Even for SAMA5D3 Xplained, almost every pin can be reprogrammed for different usages by correctly setting up its pinmux.

The pin name and GPIO name association is reported in the following table:

To quickly translate a pin name to GPIO number, let's consider the L2V() function as the one that associates the letter A as 0, B as 1, and so on. Then, the formula to convert the pin name into the corresponding GPIO number is as follows:

GPIO_num = L2V(PIN_letter) * 32 + PIN_num

For example, the PE17 pin has PIN_letter=E and PIN_num=17, so L2V(E)=4 and then this:

GPIO_num = 4 * 32 + 17 = 145

So, the pin named PE17 corresponds to GPIO number 145.

Tip

Refer to the SAMA5D3 Xplained user manual at:  http://www.atmel.com/Images/Atmel-11269-32-bit-Cortex-A5-Microcontroller-SAMA5D3-Xplained_User-Guide.pdf for further information.

GPIOs on the Wandboard

The Wandboard has ten GPIOs and only eight of them are routed on the expansion connector JP4, and the pin name to GPIO number association is reported in the following table:

Tip

A more detailed list of the Wandboard's GPIOs is reported on its Wiki page at:  http://wiki.wandboard.org/index.php/External_gpios and on the Wandboard user guide at http://wandboard.org/images/downloads/wandboard-user-guide-20130208.pdf . Even for the Wandboard, almost every pin can be reprogrammed for different usages by correctly setting up its pinmux.